1. Field of the Invention
The present invention relates generally to a method for fabricating a packaging substrate or carrier. More particularly, the present invention relates to a method for fabricating a flip-chip substrate. According to this invention, bonding apertures are formed on a chip side of the substrate in a self-aligned fashion, thereby improving the solder mask registration accuracy.
2. Description of the Prior Art
As known in the art, a packaging substrate or carrier is widely used in the semiconductor packaging to electrically connect a chip or die and a motherboard, and to dissipate the heat originated from the chip as well. The chip in the package is typically encapsulated and protected by molding compounds. Conventionally, a prior art packaging substrate is a laminate structure composed of patterned metal layers and insulating layers. The patterned metal layers are electrically interconnected together by means of plated through holes.
In “standard” packaging, the interconnection between the die and the carrier is made using wire. The die is attached to the carrier face up. A wire is then bonded first to the die, then looped and bonded to the carrier. In contrast, the interconnection between the die and carrier in flip-chip packaging is made through a conductive bump that is placed directly on the die surface. The bumped die is then flipped over and placed face down, with the bumps connecting to the carrier directly.
Demands have been recently increasing for very high-density packaging substrate for high-pin-count area array flip-chip interconnections. The term “flip-chip” refers to an electronic component or semiconductor device that can be mounted directly onto a substrate or carrier in a “face-down” manner. Because flip-chip packages do not require wirebonds, their size is much smaller than their conventional counterparts. The inductance of the signal path is greatly reduced because the flip-chip interconnection is much shorter in length. Besides, since flip chip can connect over the surface of the die, it can support vastly larger numbers of interconnects on the same die size.
However, the manufacture of the flip-chip substrate still has some bottleneck obstacles that need to be overcome. For example, in the prior art processes of making a flip-chip substrate, an additional exposure step and a development step are required to form solder mask openings in a solder mask layer in order to expose the underlying metal pads. This prior art approach suffers from misalignment problems.